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| SI9104 Vishay Siliconix High-Voltage Switchmode Regulator FEATURES * 10- to 120-V Input Range * Current-Mode Control * On-Chip 200-V, 5- MOSFET Switch * SHUTDOWN and RESET * High Efficiency Operation (>80%) * Internal Start-Up Circuit * Internal Oscillator (1 MHz) DESCRIPTION The SI9104 high-voltage switchmode regulator is a monolithic BiC/DMOS integrated circuit which contains most of the components necessary to implement a high-efficiency dc-todc converter up to 3 watts. It can either be operated from a low-voltage dc supply, or directly from a 10- to 120-V unregulated dc power source. This device may be used with an appropriate transformer to implement most single-ended isolated power converter topologies (i.e., flyback and forward). The SI9104 is available in a 16-pin wide-body SOIC and is specified over the D suffix (-40 to 85C) temperature range. FUNCTIONAL BLOCK DIAGRAM FaxBack 408-970-5600, request 70002 www.siliconix.com S-60752--Rev. E, 05-Apr-99 1 SI9104 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Voltages Referenced to -VIN (VCC < +VIN + 0.3 V) VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V +VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 V VDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 V ID (Peak) (300 s pulse, 2% duty cycle). . . . . . . . . . . . . . . . . . . . . 2 A ID (rms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .250 mA Logic Inputs (RESET, SHUTDOWN, OSC IN) . . -0.3 V to VCC + 0.3 V Linear Inputs (FEEDBACK, SOURCE) . . . . . . . . . . . . . . -0.3 V to 7 V HV Pre-Regulator Input Current (continuous) . . . . . . . . . . . . . . .3 mA Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 125C Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 to 85C Junction Temperature (TJ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150C Power Dissipation (Package)a 16-Pin Plastic Wide-Body SOICb . . . . . . . . . . . . . . . . . . . . . 900 mW Thermal Impedance (JA) 16-Pin Plastic Wide-Body SOIC . . . . . . . . . . . . . . . . . . . . . . 140C/W Notes a. Device mounted with all leads soldered or welded to PC board. b. Derate 7.2 mW/C above 25C. RECOMMENDED OPERATING RANGE Voltages Referenced to -VIN VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V to 13.5 V +VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V to 120 V fOSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40 kHz to 1 MHz ROSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 k to 1 M Linear Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 7 V Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VCC SPECIFICATIONSa Test Conditions Unless Otherwise Specified Parameter Reference Output Voltage Output Impedancee Short Circuit Current Temperature Stabilitye Long Term Stabilitye VR ZOUT ISREF TREF VREF = -VIN t = 1000 hrs., TA = 125C OSC IN = - VIN (OSC Disabled) RL = 10 M Room Full Room Room Full Room 3.92 3.85 15 70 4.0 30 100 0.25 5 4.08 4.15 45 130 1.0 25 V k A mV/C mV Limits D Suffix -40 to 85C Symbol DISCHARGE = -VIN = 0 V, VCC = 10 V +VIN = 48 V, RBIAS = 390 k ROSC = 330 k Tempb Mind Typc Maxd Unit Oscillator Maximum Frequencye Initial Accuracy Voltage Stability Temperature Coefficiente fMAX fOSC f/f TOSC ROSC = 0 ROSC = 330 kf ROSC = 150 kf f/f = f(13.5 V) - f(10 V) / f(10 V) Room Room Room Room Full 1 80 160 4 3 100 200 10 200 120 240 15 500 MHz kHz % ppm/ C Error Amplifier Feedback Input Voltage Input BIAS Current Input OFFSET Voltage Open Loop Voltage Gaine Unity Gain Bandwidthe Dynamic Output Impedancee Output Current Power Supply Rejection VFB IFB VOS AVOL BW ZOUT IOUT PSRR Source (VFB = 3.4 V) Sink (VFB = 4.5 V) 10 V VCC 13.5 V OSC IN = - VIN (OSC Disabled) FB Tied to COMP OSC IN = - VIN (OSC Disabled) OSC IN = - VIN, VFB = 4 V Room Room Room Room Room Room Room Room Room 0.12 50 60 0.7 3.96 4.00 25 15 80 1 1000 -2.0 0.15 70 2000 -1.4 4.04 500 40 V nA mV dB MHz mA dB S-60752--Rev. E, 05-Apr-99 2 FaxBack 408-970-5600, request 70002 www.siliconix.com SI9104 Vishay Siliconix SPECIFICATIONSa Test Conditions Unless Otherwise Specified Parameter Current Limit Threshold Voltage Delay to Output VSOURCE td RL = 100 from DRAIN to VCC, VFB = 0 V RL = 100 from DRAIN to VCC VSOURCE = 1.5 V, See Figure 1. IIN = 10 A VCC 10 V Pulse Width 300 s, VCC = 7 V IPRE-REGULATOR = 10 A RL = 100 from DRAIN to VCC See Detailed Description Room Room 1.0 1.2 100 1.4 200 V ns Limits D Suffix -40 to 85C Symbol DISCHARGE = -VIN = 0 V, VCC = 10 V +VIN = 48 V, RBIAS = 390 k ROSC = 330 k Tempb Mind Typc Maxd Unit Pre-Regulator/Start-Up Input Voltage Input Leakage Current Pre-Regulator Start-Up Current VCC Pre-Regulator Turn-Off Threshold Voltage Undervoltage Lockout VREG - VUVLO +VIN +IIN ISTART VREG VUVLO VDELTA Room Room Room Room Room Room 8 7.8 7.0 0.3 15 9.4 8.8 0.6 9.8 9.3 V 120 10 V A mA Supply Supply Current Bias Current ICC IBIAS Room Room 0.45 10 0.6 15 1.0 20 mA A Logic SHUTDOWN Delaye SHUTDOWN Pulse Width RESET Pulse Widthe Latching Pulse Widthe SHUTDOWN and RESET Low Input Low Voltage Input High Voltage Input Current Input Voltage High Input Current Input Voltage Low e tSD tSW tRW VSOURCE = -VIN, See Figure 2. Room Room Room 50 50 25 50 100 See Figure 3. tLW V IL VIH IIH IIL VIN = VCC VIN = 0 V Room Room Room Room Room -35 8.0 1 -25 5 ns 2.0 V A MOSFET Switch Breakdown Voltage Drain-Source On-Resistanceg VBR(DSS) rDS(on) IDSS CDS IDRAIN = 100 A IDRAIN = 100 mA VDRAIN = 150 V Full Room Room Room 200 220 3 5 35 5 10 V A pF Drain Off Leakage Current Drain Capacitancee Notes a. Refer to PROCESS OPTION FLOWCHART for additional information. b. Room = 25C, Cold and Hot = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. Guaranteed by design, not subject to production test. f. CSTRAY @ OSC IN 5 pF. g. Temperature coefficient of rDS(on) is 0.75% per C, typical. FaxBack 408-970-5600, request 70002 www.siliconix.com S-60752--Rev. E, 05-Apr-99 3 SI9104 Vishay Siliconix TIMING WAVEFORMS FIGURE 1. FIGURE 2. FIGURE 3. TYPICAL CHARACTERISTICS FIGURE 4. FIGURE 5. S-60752--Rev. E, 05-Apr-99 4 FaxBack 408-970-5600, request 70002 www.siliconix.com SI9104 Vishay Siliconix PIN CONFIGURATIONS PIN DESCRIPTION Pin Number Function SOURCE -VIN VCC OSCOUT OSCIN DISCHARGE VREF SHUTDOWN RESET COMP FB BIAS +VIN DRAIN NC 14-Pin Plastic DIP 4 5 6 7 8 9 10 11 12 13 14 1 2 3 16-Pin SOIC 1 2 4 5 6 7 8 9 10 11 12 13 14 16 3, 15 20-Pin PLCC 7 8 9 10 11 12 14 16 17 18 20 2 3 5 1, 4, 6, 13, 15, 19 FaxBack 408-970-5600, request 70002 www.siliconix.com S-60752--Rev. E, 05-Apr-99 5 |
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